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Grossmont Cuyamaca Community College District Portfolio Circuits Paper

Grossmont Cuyamaca Community College District Portfolio Circuits Paper

Question Description

1. (10 points) Design a circuit that implements the function, F(W,X,Y,Z) = ?m(1,7,8,10,13) as a NOR-OR, 2-level gate array. Submit the schematic and a screenshot of a simulation verifying the output for the input 1011.

2. (10 points) Design a circuit that uses multiplexors to perform 2’s complement on a 3-bit binary number. Assume overflow bits are lost. Submit your schematic and a screenshot of a simulation verifying the output for an input of 101.

3. (20 points) Design a circuit that encodes a 2-bit octal number to binary and then decodes the binary number to decimal. Draw the block diagram for the entire circuit. Be sure to include how many inputs and outputs are required for both the encoding and decoding steps.

4. (20 points) A circuit that accepts two 1-bit binary inputs, A and B, adds A and B together and produces the outputs Sum and Carry is sometimes referred to as a “Half Adder”. Design a circuit that accepts inputs A, B and Opp and uses a multiplexor to select between a half-adder circuit (A+B) and a multiplier (A*B). Your outputs should be Sum and Carry. Submit two simulations of your Multisim schematic, one verifying the conditions A = 1, B = 1, Opp = 0 and the second verifying the conditions A = 0, B = 1, Opp = 1.

Submission Specifications

Using the word-processing software of your choice (eg. GoogleDocs or Word), import each required schematic, expression or K-map table with all figures appropriately labeled. Save as ENGR270FinalYourName.pdf. Upload via Canvas. Pat yourself on the back, you earned it! Best of luck in your endeavors!

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